Low-power communication IP (CEA, GINP)

The core of this activity is on the design and characterization of IP communication blocks, exploiting FDSOI. The considered blocks are channel sensor, tunable matching networks, backscattering module, clock management, power management, conf register and interface management and beamforming module. Most of the blocks will be dedicated to the development of the component for the final demonstration. It will be also exploited to provide some feedback to the standardization process. The final development aim to be exploited at the component level to evaluate the communication in different applications.

Challenges addressed:

• Development of a new communication technique still in standardization (zero energy communication)
• Development of a channel sensor with few uW power consumption
• Adding frequency discrimination or ID detection to channel sensor
• Co-design between the tunable matching network and the antenna
• Development of more efficient backscattering modulation scheme
• Ultra Low Power Clock Management
• Implement beamforming with limited impact to the power consumption

CEA will be involved in the development of IPs for IoT applications and more specifically for the new communication approach called zero-energy communication. The work will be focusing on two different frequency bands. A first set of building blocks operating at 800MHz (with potentially additional bandwidths) will be developed to be compatible with 4G and 5G communication systems. It will include tuneable matching network, channel sensing, backscattering module, clock and power management and a digital chip controller. It will be used for the demonstrator. The second set of building blocks will be focusing on the 3.5 GHz frequency with similar building blocks and also advanced functionality to boost the performances (clock recovery, advanced modulation, beam steering, circuit enabling antenna miniaturization, ...). Each functionality will be tested individually.

GINP will develop channel sensing circuits (IPs) for zero energy communication (ZEC) application. These IPs will be used in a prototype in FDX technology to demonstrate the potentiality of this new type of communication. In ZEC, the communication system must be fully energy autonomous. The channel sensor must discriminate frequency band and/or user to detect when communication shall be initiated. State of the art shows that fully integrated ultra-low power radios based on energy detection fulfil requirement in term of power consumption but are unable to discriminate frequencies. Adding functionalities such as frequency discrimination or ID detection dramatically impact power consumption. GINP plan to address this specific issue with the developed IPs.

In parallel, GINP's goal is to define an all-digital RF receiver architecture based on sub-sampling or non-uniform sampling techniques and digital filters. The implementation targets the down conversion and the demodulation of an IF signal (LNA and RF mixers are not part of this study). Such an approach aims low power and a reduced baseband controller area.